Metadata Management for Large-Scale Hybrid Memory Architectures
Event Type
Research Poster
TimeTuesday, June 23rd4:05pm - 4:10pm
LocationAnalog 1
DescriptionA hybrid memory architecture (HMA) can realize high performance and large capacity because of combining two types of memories, a near memory (NM) and a far memory (FM). For the data management of an HMA, metadata that indicates where data are mapped in the NM or the FM are necessary. As an HMA is expected to have a larger capacity, more metadata is needed. By considering the increase in metadata, it is not practical to store all of them in a memory controller on a processor chip. Thus, to reduce the capacity for metadata, this poster supposes in-memory metadata management, in which a control mechanism of an HMA stores and metadata in the HMA itself, the NM and/or the FM. Moreover, metadata used in the future are stored on a small on-chip memory to avoid performance degradation. Toward such an HMA, this poster analyzes access patterns to the metadata to find a way to predict the metadata used in the future. The experimental results show some useful insights. First, metadata of frequently accessed data or their neighbors are likely used in the future. Second, the numbers of accesses to metadata tend to be the same if the addresses of blocks are near. By using these characteristics, the metadata that will be accessed in the future can be predicted. The results also show that, when all the predictions are failed, the HMA will reduce IPC by an average of 6% and up to 23%.
Poster PDF