Presenter
Paolo Palazzari
Biography
Paolo Palazzari (Laurea Degree ’89, Ph.D. ’94) is a researcher at ENEA, co-founder of Ylichron
Srl (an ENEA spin-off company), and has been for 8 years (2010-18) the responsible for the HLS
activities in Accelize. Formerly, he was the CTO for the SW activities of Ylichron Srl, where he
developed HCE, the Ylichron C to HDL compiler. He has been one of the main designers of
QuickCompiler, the HLS engine of the QuickPlay framework, developed by PLDA/Accelize. His
current research interests are related to HLS, parallelism extraction and its management, efficient
implementation of algorithms onto FPGA through HLS methods, massively parallel computing.
Srl (an ENEA spin-off company), and has been for 8 years (2010-18) the responsible for the HLS
activities in Accelize. Formerly, he was the CTO for the SW activities of Ylichron Srl, where he
developed HCE, the Ylichron C to HDL compiler. He has been one of the main designers of
QuickCompiler, the HLS engine of the QuickPlay framework, developed by PLDA/Accelize. His
current research interests are related to HLS, parallelism extraction and its management, efficient
implementation of algorithms onto FPGA through HLS methods, massively parallel computing.
Presentations
Research Paper
Pre-Recorded